1 n-channel 30-v (d-s) mosfet features ? halo gen-free ? trenchfe t ? power mosfet ? optimized for high-side synchronous rectifier operation ? 100 % r g test ed ? 100 % uis tested applications ? n otebook cpu core - high-side switch prod uc t summary v ds (v) r d s (on) ( ) i d (a ) a q g ( t yp.) 30 0.0089 at v gs = 10 v 13 6 .8 nc 0.012 at v gs = 4. 5 v 12 so-8 sd sd sd gd 5 6 7 8 t op v iew 2 3 4 1 n-channel mosfet g d s notes: a. base on t c = 25 c . b. surface mounted on 1" x 1" fr4 board. c. t = 10 s. d. maximum under steady state conditions is 8 5 c/w. absolute maximum ratings t a = 25 c, unless otherwise noted p a ramete r symbol limit u nit dr ain-source voltage v ds 30 v gat e -source voltage v gs 20 contin uous d rain current (t j = 150 c ) t c = 25 c i d 13 a t c = 70 c 12 t a = 25 c 11 b, c t a = 70 c 9 b, c pulsed dra in current i dm 50 continuous sou rce-drain diode current t c = 25 c i s 3.8 t a = 25 c 2.1 b, c single pulse a v alanche current l = 0.1 mh i as 22 a v alanche energy e as 24 mj max i mum power dissipation t c = 25 c p d 4.5 w t c = 70 c 2.8 t a = 25 c 2.5 b, c t a = 70 c 1.6 b, c ope r ating junction and storage temperature range t j , t stg - 55 to 150 c thermal resist ance ratings p a rameter sym bol typical maximum u nit maxim um junction-to-ambient b, d t 10 s r thja 38 50 c/w maxim um junction-to-foot (drain) steady state r thj f 22 28 www.din-tek.jp dt m44 20
2 no t es: a. p ulse test; pulse width d 300 s, duty cycle d 2 %. b. guaranteed by design, not s ubject to production testing. st resses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. specif ications t j = 25 c, unless otherwise noted pa ramete r sy mbol test conditions min. typ. max. unit static dr a in-source breakdown voltage v ds v gs = 0 v , i d = 250 a 30 v v ds t emper ature coefficient ' v ds /t j i d = 250 a 28 mv/c v gs( t h) t emper ature coefficient ' v gs ( th) /t j - 6 gate-s o urce threshold voltage v gs(t h) v ds = v gs , i d = 250 a 1.2 2 .5 v gate-source leakage i gss v ds = 0 v , v gs = 20 v 10 0 na zero gate voltage drain current i dss v ds = 30 v , v gs = 0 v 1 a v ds = 30 v , v gs = 0 v, t j = 55 c 10 on-state drain current a i d( on) v ds t 5 v , v gs = 10 v 20 a dr ain-source on-state resistance a r ds( on) v gs = 10 v, i d = 11 a 0.0077 0.0 089 : v gs = 4.5 v , i d = 10 a 0.0096 0.0 12 forward transconductance a g fs v ds = 1 5 v, i d = 1 1 a 52 s dy nam ic b inpu t capacita nce c iss v ds = 15 v , v gs = 0 v, f = 1 mhz 820 pf output capacitance c os s 195 re v erse transfer capacitance c rs s 73 t o tal gate charge q g v ds = 15 v , v gs = 10 v , i d = 11 a 15 23 nc v ds = 15 v , v gs = 5 v , i d = 11 a 6.8 10 .2 gate-source charge q gs 2.5 gate- dr ain charge q gd 2.3 g a te resistance r g f = 1 mhz 0.36 1.8 3.6 : tu r n - o n d e l ay t i m e t d( on) v dd = 15 v , r l = 1.4 : i d # 9 a, v gen = 4.5 v , r g = 1 : 16 24 ns rise time t r 12 18 t urn-off delay time t d( off) 16 24 fa ll time t f 10 20 tu r n - o n d e l ay t i m e t d( on) v dd = 15 v, r l = 1.4 : i d # 9 a, v ge n = 1 0 v, r g = 1 : 81 6 rise time t r 10 20 t urn-off delay time t d( off) 16 24 fa ll time t f 81 5 drain - source body diode characteristics continuous source-drain diode current i s t c = 25 c 25 a pulse diode forward current a i sm 50 body diode v o ltage v sd i s = 9 a 0.8 1 .2 v body diode reverse recovery time t rr i f = 9 a, di/ d t = 100 a/s, t j = 25 c 15 30 ns body diode reverse recovery charge q rr 61 2 nc reverse recovery fall time t a 8 ns re v erse recovery rise time t b 7 z z z g l q w h n m s ' 7 0
3 typica l c haracteristics 25 c, unless otherwise noted ou tp ut characteristics on-resistance vs. drain current and gate voltage gate charge 0 10 20 30 40 50 0246 8 10 v gs =1 0t hr u 4 v v gs =3 v v ds - drain -to-so u rce v oltage ( v ) - drain c u rrent (a) i d 0.005 0.007 0.009 0.011 0.013 0.015 0 1 020304050 v gs =4 . 5 v v gs =1 0 v - on - resistance ( ) r ds( on) i d - drain c u rrent (a) 0 2 4 6 8 10 04 8 12 16 v ds = 24 v i d = 11 a v ds =1 5 v - gate - to-so u rce v oltage ( v ) q g - t otal gate charge (nc) v gs t r ansfer characteristics capacitance on-resistance vs. junction temperature 0 1 2 3 4 5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 t c = 25 c t c = 125 c t c =- 5 5 c v gs - g ate-to-so u rce v oltage ( v ) - drain c u rrent (a) i d c rss 0 300 600 900 1200 0 6 12 1 8 24 30 c is s c oss v ds - drain -to-so u rce v oltage ( v ) c - capacitance (pf) 0.6 0.9 1.2 1.5 1. 8 - 50 - 25 0 25 50 75 100 125 150 v gs =4 . 5 v v gs =1 0 v i d = 11 a t j -j u nction t emperat u re (c) ( n ormalized) - on - resistance r ds(on) www.din-tek.jp dt m44 20
4 ty pi cal characteristics 25 c, unless otherwise noted source-drain diod e forward voltage threshold voltage 0.0 0.2 0.4 0.6 0. 8 1.0 1.2 1 0.01 0.001 0.1 10 100 t j = 150 c t j = 25 c v sd -s o u rce-to-drain v oltage ( v ) - so u rce c u rrent (a) i s 1.0 1.2 1.4 1.6 1. 8 2.0 2.2 - 50 - 25 0 25 50 75 100 125 150 i d = 250 a ( v ) v gs( th) t j - t emperat u re (c) on-resistan ce vs. gate-to-source voltage single pulse power, junction-to-ambient 0.000 0.005 0.010 0.015 0.020 0.025 0.030 02 4 6 8 10 t j =2 5 c t j = 125 c - on - resistance ( ) r ds( on) v gs - g ate-to-so u rce v oltage ( v ) 0 50 10 p o wer (w) time (s) 20 1 100 600 10 10 -1 10 -2 10 -3 30 40 safe op er ating area, junction-to-ambient 100 1 0.1 1 10 100 0.01 10 0.1 t a =2 5 c single p u lse 100 a 1s 10 s limited b yr ds (on) * b v dss limited 1m s 10 ms 100 m s dc v ds - drain -to-so u rce v oltage ( v ) * v gs > minim u m v gs at w hich r ds(on) is specified - drain c u rrent (a) i d www.din-tek.jp dt m44 20
5 typica l c haracteristics 25 c, unless otherwise noted * t he po wer dissipation p d is based on t j( ma x) = 150 c, using junction-to-case thermal resi stance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. it is used to determine the current rating, when this rating falls below the package limit. current derating* 0 3 6 9 12 15 1 8 0 25 50 75 100 125 150 t c - case temperat u re (c) i d - drain c u rrent (a) po wer de rating, junction-to-foot 0 1 2 3 4 5 6 0 25 50 75 100 125 150 t c - case temperat u re (c) po w er ( w ) po we r derating, junction-to-ambient 0.0 0.5 1.0 1.5 2.0 0 25 50 75 100 125 150 t a -a m b ient temperat u re (c) po w er ( w ) www.din-tek.jp dt m44 20
6 ty pi cal characteristics 25 c, unless otherwise noted norm alized t hermal transient im pedance, junction-to-ambient 10 -3 10 -2 1 1 0 600 10 -1 10 -4 100 2 1 0.1 0.01 0.2 0.1 0.05 0.02 single pulse duty cycle = 0.5 square wa ve pulse duration (s) nor maliz ed ef fective t ransient thermal impedance 1. duty cycle, d = 2. per unit base = r th j a = 70 c/w 3. t jm - t a = p dm z th j a (t ) t 1 t 2 t 1 t 2 notes: 4. surface mounted p dm normalized thermal transient impedance, junction-to-foot 10 -3 10 -2 11 0 10 -1 10 -4 2 1 0.1 0.01 0.2 0.1 0.05 0.02 single pulse duty cycle = 0.5 square w a ve pulse duration (s) nor maliz ed effective transient thermal impedance www.din-tek.jp dt m44 20
1 di m millimeter s inc hes min ma x min max a 1 .35 1.7 5 0.053 0.069 a 1 0 .10 0.2 0 0.004 0.008 b 0.35 0.51 0.014 0.020 c 0.19 0.25 0.0075 0.010 d 4.80 5.00 0.189 0.196 e 3.80 4.00 0.150 0.157 e 1.27 bsc 0.050 bsc h 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.020 l 0.50 0.93 0.020 0.037 q0 8 0 8 s 0.44 0.64 0.018 0.026 ecn: c-06527-rev. i, 11-sep-06 dwg: 5498 4 3 1 2 5 6 8 7 h e h x 45 c all lea d s q 0.101 mm 0.004" l ba 1 a e d 0.25 mm (ga ge pla ne) soic (narrow): 8-lead jedec p a rt n u m b er: ms -012 s package information www.din-tek.jp
1 appl ication note r ecommended minimum pads for so-8 0.246 (6.248) recommended mi nimum pads dimensions in inches/(mm) 0.172 (4.369) 0.152 (3.861) 0.047 (1.194) 0.028 (0.71 1) 0.050 (1.270) 0.022 (0.559) return to index r eturn to inde x application note www.din-tek.jp
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